This is a simple design circuit that uses a CMOS dual re-trigger mono stable IC 4528 in a cascade timer circuit. The CMOS timer can be easily cascaded with other similar 4528 circuits to lengthen the timing needed. This is the figure of the circuit.The timing of the project is determine by VR3 and C1 for the first stage and VR4 and C2 for the second stage. Once button S1 is pressed, the 1st
